1. Extensive experience in new looping development, NPI for complex structures, and advanced skills for maintaining high yield performance in mass production. 2. Minimum 12 years of experience in wire bonding processes, focusing on semiconductor packaging, particularly memory ICs (eMMC, UFS, uMCP, LPDRAM, Flash IC). Experience with other package types (e.g., SCSP, CABGA, sMLF) is a plus. 3. Proven expertise with advanced wire bonding equipment and techniques for fine pitch bonding, high-density packages, and multi-die structures. Hands-on experience troubleshooting and maintaining wire bonding equipment (e.g., K&S). 4. Strong knowledge in process optimization, yield improvement, and loop shape control, including Ultra Low loop bonding, gold wire properties, and capillary design. Familiarity with equipment setup, calibration, and maintenance, along with proficiency in analyzing defects (e.g., non-sticks, short loops) and implementing corrective actions. Competence in DOE and FMEA methodologies. Strong problem-solving skills, with a proactive approach to challenges. Good communication skills, with the ability to collaborate cross-functionally and contribute to team harmony. Ability to train and mentor junior engineers. Dispatch experience preferred. Bachelor's degree in Engineering preferred; however, practical expertise and insight into process optimization are the key requirements.

1. Lead the development and optimization of wire bonding processes, focusing on yield enhancement and reliability. 2. Innovate and implement advanced looping techniques for new, complex product introductions. 3. Oversee equipment setup, calibration, and preventive maintenance to ensure optimal performance. 4. Collaborate with suppliers to resolve technical challenges and maintain high equipment standards. 5. Analyze yield data, identify trends, and implement corrective actions for process improvement. 6. Conduct root cause analysis of wire bonding defects and drive process changes 7. Support NPI by ensuring robust wire bonding processes aligned with design requirements. 8. Provide expert input during design reviews to ensure manufacturability and minimize bonding risks. 9. Mentor junior engineers and operators, sharing expertise in wire bonding and best practices 10. Address bonding challenges related to new designs and materials proactively 11. Collaborate with suppliers and industry leaders in memory packaging to resolve technical challenges and align on process development and equipment standards.